The disclosure generally relates to data prefetching, and more particularly, to data prefetch ramp implementation based on memory utilization.
Data prefetch (cache management) instructions, which have conventionally used direct addressing, have been employed to move data into a cache before the data is accessed in an attempt to minimize cache-miss latency. Data prefetch instructions (which may be added to software by a compiler or programmer) are generally treated as hints, which affect software performance but not software functionality. Prefetched data in a same cache line as desired data has spatial locality and has a high probability of being accessed in the near future. Data with temporal locality, or persistence, is expected to be accessed multiple times and should generally be maintained in a cache for ready accessibility. Accesses to data with no temporal locality is transient, and, as such, data with no temporal locality should generally be removed from a cache after use to provide room in the cache for other data.
Some data prefetch instructions allow a cache level in which prefetched data should be stored to be specified. Various data prefetch instructions make a distinction between memory which is expected to be read and memory which is expected to be written. When data is to be written, a data prefetch instruction usually moves a data block into a cache in an exclusive or modified state so that an expected store can be made directly in the cache, as contrasted with main memory. A prefetch for data to be written can usually be replaced with a prefetch for data to be read (this is usually how implementations that define both kinds of instructions, but do not support prefetch for writes, operate). A data block accessed by a data prefetch instruction usually corresponds to a cache line, whose size is implementation-specific.
Various architectures implement data prefetch instructions in various ways. For example, some architectures implement data prefetch instructions with a base update form, which modifies a prefetch address following a prefetch. Base update (pre/post increment/decrement) is also supported on load and store instructions for some architectures and can be taken into consideration in code that uses data prefetch instructions. Some architectures recognize data prefetch instructions but treat them as no operation (nop) instructions. However, a base address of a data prefetch instruction that has a base update form may be updated even if addressed memory cannot be prefetched. Some architectures implement data prefetch instructions that cause faults when the address to prefetch is invalid or not cacheable. However, data prefetch instructions are usually ignored for memory pages that are not cacheable. In general, data should be available in a cache prior to being accessed. However, using prefetches that are too speculative can produce negative results as there are costs associated with data prefetch instructions. Similarly, prefetching data that is already in the cache increases overhead without providing any benefit. For example, data may already be in a cache when the data is in the same cache line as data already prefetched (spatial locality) or if the data has been accessed recently (temporal locality).